This invention relates to an optoelectronic memory and logic device with a function of a reset-set flip-flop (RS-FF) or an exclusive-OR (EOR) gate. It operates with optical input and output, and can be applied to optical interconnections, optical digital computing, optical neural networks, and direct image processing.
The background for optical RS-FF's is first described. An example of optoelectronic memory device is shown in Japanese Patent Application Provisional Publication No. 62-13086. This memory device is an optical bistable circuit which is turned on or off with input light and emits output light in the on-state. The circuit diagram of the memory device is shown in FIG. 7. A light emitting device 1 and a first phototransistor 2 are connected in series to constitute an optical bistable switch 3. A second phototransistor 4 is connected in parallel to the optical bistable switch 3, and a load resistor 5 is connected in series to them. The "on" or "off" state of the optical bistable switch 3 is controlled by a first and a second input lights 6, 7 incident upon the first and the second phototransistor 2, 4, and output light 8 is emitted from the light emitting device 1 when the optical bistable switch 3 is in the on-state.
The optical bistable switch 3 is operated as follows: (1) Without input light incident upon the first phototransistor 2, current does not flow through the optical bistable switch 3, and the light emitting device 1 does not emit light even if bias voltage is applied (off-state). (2) When the first input light 6 is incident upon the first phototransistor 2 with the bias voltage applied, current flows through the optical bistable switch 3, and the light emitting device 1 emits the output light 8 (on-state). (3) When the first input light 6 is stopped with the bias voltage applied, the optical bistable switch 3 keeps the on-state since the first phototransistor 2 receives the light emitted from the light emitting device 1. (4) The optical bistable switch 3 is turned off when the bias voltage is reduced to the voltage unable to maintain the on-state.
In the optical bistable circuit shown in FIG. 7, the optical bistable switch 3 is turned off by the second input light 7 incident upon the second phototransistor 4. The photocurrent flowing through the second phototransistor 4 causes additional voltage drop in the load resistor 5 and reduces the bias voltage for the optical bistable switch 3. Therefore, the optical bistable switch 3 is turned on with the first input light 6 and turned off with the second input light 7. It is not necessary to change the voltage applied to the whole optical bistable circuit when the optical bistable switch 3 is turned on or off with the input light.
The optoelectronic memory device described above emits output light only in the on-state. However, an optical RS-FF, an optical bistable circuit emitting two complementary outputs, is desirable in some applications, especially in the application to dual rail optical logic. The optoelectronic memory device improved to emit two complementary outputs is described in Japanese Patent Application Provisional Publication No. 2-125467. The circuit diagram is shown in FIG. 8. A first light emitting device 9 and a first phototransistor 10 are connected in series to constitute an optical bistable switch 11. A second light emitting device 12 and a second phototransistor 13 are connected in parallel to the optical bistable switch 11, and a load resistor 14 is connected in series to them. The circuit has the same configuration and operates in the same manner as the circuit shown in FIG. 7 except that it includes the second light emitting device 12.
The second light emitting device 12 has higher built-in voltage than the first light emitting device 9. This is attained by using wider band-gap material for the second light emitting device 12 or by using a series connection of diodes as the second light emitting device 12. The voltage-current curve of the optical bistable switch 11 in the on-state is almost the same as that of the first light emitting device 9. As a result, more current flows through the optical bistable switch 11 than through the second light emitting device 12 when the optical bistable switch 11 is in the on-state. The current through the second light emitting device 12 increases when the optical bistable switch 11 is turned off because the current through the optical bistable switch 11 is stopped and the voltage drop in the load resistor 14 is reduced.
Therefore, the second light emitting device 12 emits output light only when the optical bistable switch 11 is in the off-state if the bias voltage applied to the whole circuit is set properly. Under this condition, complementary output lights is emitted from the first light emitting device 9 and the second light emitting device 12. The optical bistable switch 11 is turned on with the first input light 15 incident upon the first phototransistor 10, and the first light emitting device 9 emits a first output light 16. The optical bistable switch 11 is turned off with the second input light 17 incident upon the second phototransistor 13, and the second light emitting device 12 emits a second output light 18. In this configuration, however, it is difficult to obtain high output optical power and high contrast ratio at the same time. The bias voltage should be increased to obtain high output power, which results in inferior contrast ratio, the ratio of output powers in the on-state and in the off-state, for the second light emitting device 12.
Another example of optical RS-FF is described in the Technical Digest of the Seventh International Conference on Integrated Optics and Optical Fiber Communication (IOOC'89), paper 20C3-4 (K. Hara et al., "A differential optical switching device using parallelly connected AlGaAs pnpn structures"). The schematic structure is shown in FIG. 9. This optical bistable circuit consists of a first and a second optical bistable switches 19, 20 connected in parallel and a common load resistor 21 connected to them. The optical bistable switches have a pnpn structure and exhibit bistability based on just the same operation principle as a photothyristor. The pnpn structure emits output light in the on-state since it is constructed with AlGaAs/GaAs materials.
The value of the load resistor 21 and the bias voltage V.sub.D are adjusted so that only one of the optical bistable switches 19, 20 can take the on-state. Which optical bistable switch takes the on-state is controlled by a first and a second input lights 22, 23. If the power of the first input light 22 is greater than that of the second input light 23, the first optical bistable switch 19 takes the on-state and emits a first output light 24. If the power of the second input light 23 is greater than that of the first input light 22, the second optical bistable switch 20 takes the on-state and emits a second output light 25. In this configuration, however, the value of the load resistor 21 and the bias voltage V.sub.D should be controlled precisely. If the bias voltag is smaller or the load resistance is larger than the proper value, neither of the optical bistable switch can take the on-state. If the bias voltage is larger or the load resistance is smaller than the proper value, both of the optical bistable switches take the on-state at the same time.
Then the background for optical EOR gates is described. An example of EOR gate operating with optical input and output is shown in Japanese Patent Application Provisional Publication No. 3-215836. This EOR gate is based on the above-mentioned optical bistable circuit in Japanese Patent Application Provisional Publication No. 62-13086. The circuit diagram of the EOR gate is shown in FIG. 10. It consists of a first and a second optical bistable circuits 26, 27. In the first optical bistable circuit 26, a first optical bistable switch 28, which is a series connection of a first light emitting device 29 and a first phototransistor 30, and a second phototransistor 31 are connected in parallel, and a first load resistor 32 is connected in series to them. In the second optical bistable circuit 27, a second optical bistable switch 33, which is a series connection of a second light emitting device 34 and a third phototrnasistor 35, and a forth phototransistor 36 are connected in parallel, and a second load resistor 37 is connected in series to them.
The first and the second optical bistable circuits 26, 27 are laid out so that the first and the forth phototransistors 30, 36 can receive a first input light 38 at the same time and that the second and the third phototransistors 31, 35 can receive a second input light 39 at the same time. In this configuration, the first optical bistable switch 28 is turned on only when the first input light 38 is incident ("on") and the second input light 39 is not incident ("off"). The second optical bistable switch 33 is turned on only when the first input light 38 is "off" and the second input light 39 is "on". In other words, both of the optical bistable switches 28, 33 are turned off and neither emits output light when the "on" or "off" states of the first and the second input lights 38, 39 are coincide, and one of the optical bistable switches is turned on and emits output light when the states of the first and the second input lights 38, 39 are not coincide. This is EOR operation between the input lihgts 38, 39.
To utilize this EOR gate in cascade, however, the output lights from the first and the second light emitting devices 29, 34 should be converted to a single optical beam. Though this may be attained by utilizing some optical elements or by detecting the two output lights with a single photodetector in the next stage, the optical alignment becomes subtle in either case.